AMD / Xilinx Vivado™ Design Suite

AMD / Xilinx Vivado™ Design Suite is software used for adaptive SoCs and FPGAs. AMD / Xilinx software covers design entry, synthesis, place/route, and verification/simulation tools. The software's advanced features help hardware designers cut compile times, streamline design iterations, and improve power estimation accuracy for AMD adaptive SoCs and FPGAs.

Features

  • Supports design entry in traditional HDL like VHDL and Verilog
  • Supports a graphical user interface-based tool called the IP Integrator (IPI) that allows for a plug-and-play IP integration design environment 
  • Vivado ML Edition delivers the best-in-class synthesis and implementation for complex FPGAs and SOCs with built-in capabilities for timing closure and methodology 
  • UltraFast methodology report (report_methodology) is available in the default flow of Vivado, helps constrain designs, analyze results, and close timing
  • Vivado’s verification features enable efficient validation of design functionality, while its comprehensive debugging features empower engineers to locate and resolve issues within complex FPGA designs efficiently 
  • Dynamic Function eXchange (DFX) allows designers to dynamically modify sections of the FPGA designs on-the-fly
  • Download partial bitstreams to the FPGA while the remaining logic continues to operate
  • Dynamic Function eXchange can allow designers to move to fewer or smaller devices, reduce power, and upgrade systems

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Infographic

Infographic - AMD / Xilinx Vivado™ Design Suite
Publicado: 2024-05-06 | Actualizado: 2025-09-10